Apple Silicon Chip Benchmarks
LLM inference data for 75 chip configurations across 17 chip families. M1 through M5 — base, Pro, Max, and Ultra tiers.
M5 Max
3 benchmark rows · 3 models tested · fastest: 229.0 tok/s
M5
4 benchmark rows · 3 models tested · fastest: 98.4 tok/s
M4 Max
34 benchmark rows · 13 models tested · fastest: 184.4 tok/s
M4 Pro
18 benchmark rows · 4 models tested · fastest: 119.3 tok/s
M4
14 benchmark rows · 4 models tested · fastest: 76.2 tok/s
M3 Ultra
7 benchmark rows · 3 models tested · fastest: 178.8 tok/s
M3 Max
14 benchmark rows · 4 models tested · fastest: 149.0 tok/s
M3 Pro
13 benchmark rows · 4 models tested · fastest: 89.8 tok/s
M3
7 benchmark rows · 3 models tested · fastest: 67.2 tok/s
M2 Ultra
8 benchmark rows · 4 models tested · fastest: 176.4 tok/s
M2 Max
9 benchmark rows · 3 models tested · fastest: 153.0 tok/s
M2 Pro
9 benchmark rows · 3 models tested · fastest: 100.3 tok/s
M2
12 benchmark rows · 3 models tested · fastest: 56.5 tok/s
M1 Ultra
9 benchmark rows · 3 models tested · fastest: 151.1 tok/s
M1 Max
11 benchmark rows · 3 models tested · fastest: 125.8 tok/s
M1 Pro
13 benchmark rows · 4 models tested · fastest: 78.2 tok/s
M1
9 benchmark rows · 3 models tested · fastest: 40.4 tok/s
Data
benchmarks.json — full dataset · chips.json — chip summaries · benchmarks.csv — CSV export