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qwen-2-5-7b-instruct — ranking first, raw rows below

Start with the ranked Mac table above. Use the rest of this page to inspect raw Apple Silicon coverage and model metadata.

Quantizations observed: Q8_0

1Benchmark rows
1Chip tiers covered
49.7Fastest avg tok/s (M4 Max (128 GB))
Minimum RAM observed

Fastest published result is 49.7 tok/s on M4 Max (128 GB) at Q8_0. Longest published context on this page is 10k. Published runtimes include LM Studio. Start with Rankings for the decision, then use the raw rows below to audit the evidence.

Based on 1 external benchmark; no lab runs yet.

Published runtimes: LM Studio.

Published chip coverage includes M4 Max (128 GB). Fastest published row is 49.7 tok/s on M4 Max (128 GB) at Q8_0. Catalog context window is 10k.

Raw benchmark rows for qwen-2-5-7b-instruct

Rows stay below the ranking because this page is answer-first. Use them to inspect exact chips, quantizations, runtimes, and sources.

ChipQuantRAM req.ContextAvg tok/sPrompt tok/sRuntimeSource
M4 Max (128 GB)Q8_010k49.7 tok/sLM Studioref

Ordered by fastest published tok/s on the chip family in each Mac. Click through for the full machine page.

benchmarks.json — full dataset  ·  models.json — model summaries  ·  benchmarks.csv — CSV export

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